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IT6161: MIPI to HDMI Converter

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Specification Table

Poduct Information
Specification Table
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Poduct Information

IT6161: MIPI to HDMI Converter

The IT6161 is a high-performance and low-power MIPI to HDMI converter, fully compliant with MIPI D-PHY 1.1, DSI 1.1 and HDMI 1.4b, HDCP 1.4 and backward compatible with DVI 1.0 specifications. The IT6161 supports four lanes MIPI RX and HDMI TX interface. The data transfer rate of MIPI RX is up to 1 Gbps per lane.

IT6161 support MIPI DSI packed pixel stream 24-bit RGB888, loosely packed pixel stream 18-bit RGB666 and packed pixel stream 18-bit RGB666 mode, the sync even short packets can be received and generate HSync and VSync by firmware setting. A Pattern Generator is embedded in the IT6161, and thus the video data and timing can be easily switched from external MIPI RX to internal pattern generator for testing.

MIPI input 1/2/4-lane swap and HDMI output channel swap and PN swap can be controlled separately for flexible circuit layout.

Aside from the various video output formats supported, the IT6161 also supports 8 channels of I2S digital audio, with sampling rate up to 192 kHz and sample size up to 24 bits. IT6161 also support S/PDIF input of up to 192 kHz sampling rate.

The newly supported High-Bit Rate (HBR) audio by HDMI Specifications v1.4b is provided by the IT6161 in two interfaces: with the four I2S input ports or the S/PDIF input port. With both interfaces the highest possible HBR frame rate is supported at up to 768 kHz.

By default the IT6161 comes with integrated HDCP ROMs which are pre-programmed with HDCP keys that ensures secure digital content transmission. Users need not worry about the procurement and maintenance of the HDCP keys.

The IT6161 also provides a complete solution of Consumer Electronics Control (CEC) function. This optional CEC feature of HDMI specification allows the user to control two or more CEC-enabled devices through HDMI network. With IT6161 embedded CEC PHY, users can use high-level software API to easily implement all the necessary remote control commands. The CEC bus related protocol is handled by the CEC PHY which eliminates extra loading of the MCU.

IT6161 provides I2C interface for firmware setting. Please refer to the IT6161 Programming Guide if necessary.

Features

4-lane MIPI RX with total 4 Gbps bandwidth
Flexible MIPI Rx lane swap and P/N swap configuration
Compliant with MIPI D-PHY 1.1 and DSI 1.1 specifications
Single HDMI transmitter
Compliant with HDMI 1.4b, HDCP 1.4 and DVI 1.0 specifications
Supporting pixel rates from 25 MHz to 165 MHz:

- DTV resolutions: 480i, 576i, 480p, 576p, 720p, 1080i up to 1080p

- PC resolutions: VGA, SVGA, XGA, SXGA up to UXGA

Support output channel swap and P/N swap
Supporting the following 24-bit RGB 4:4:4 progressive video formats:

- DTV resolutions: 480p, 576p, 720p, up to 1080p

- PC resolutions: VGA, SVGA, XGA, up to SXGA

Various Packed Pixel Stream of DSI are supported, such as:

- 18/24 bit RGB 4:4:4

- 18-bit RGB 4:4:4 (Loosely)

Support HDMI 1.4 3D feature

- Frame packing mode up to 1080P@23.98/24 Hz and 720P@59.94/60 Hz

- Top and bottom up to 1080P@59.94/60 Hz

- Side-by-side (half) up to 1080P@59.94/60 Hz

- Side-by-side (full) up to 720P@59.94/60 Hz

Bi-direction Color Space Conversion (CSC) between RGB and YCbCr color spaces with programmable coefficients.
Support digital audio input interface

- sample size: 16~24 bits

- four I2S interfaces supporting 8-channel audio

- S/PDIF interface supporting PCM, Dolby Digital, DTS digital audio transmission at up to 192 kHz

- Support for high-bit-rate (HBR) audio such as DTS-HD and Dolby TrueHD through the four I2S interface or the S/PDIF interface, with frame rates as high as 768 kHz

- Compatible with IEC 60958 and IEC 61937

Software programmable HDMI output current, enabling users to optimize performance for fixed-cable systems or those with pre-defined cable length
MCLK input is optional for audio operation. Users could opt to implement audio input interface with or without MCLK.
Integrated pre-programmed HDCP keys
Purely hardware HDCP engine increasing robustness and security of HDCP operation
Monitor detection through Hot Plug Detection and Receiver Termination Detection
Embedded full-function pattern generator
Intelligent, programmable power management
Embedded hardware controlled CEC PHY
56-pin (7 x 7 mm) QFN package

Specification Table

After years of technology development, ITE has owned many types of advanced Silicon Intellectual Property (SIP) and highly integrated technology of system software/hardware.

PART NO.

PACKAGE TYPE

DESCRIPTION

FLASH SUPPORT

IT6161FN

56-pin QFN (7 mm x 7 mm)

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IT6161: MIPI to HDMI Converter

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